As semiconductor devices continue to get smaller and technology nodes shrink into the lower nanometer range, device scaling needs to continue to provide both lower cost and improved performance. An advanced self-aligned patterning (ASAP) is one of the methods for extending the capabilities of photolithographic techniques. FIG. 1 illustrates a conventional ASAP film stack. In FIG. 1, an ultra low-K (ULK) layer 103 is formed over an Nblock (©Applied Materials) layer 101, and a self-aligned contact (SAC) silicon nitride (SiN) layer 105 is formed over the ULK layer 103. Next, a TiN layer 107 and a SiN layer 109 are consecutively formed over the SAC SiN layer 105 as a hardmask (HM) and memorization layer, respectively. Then, an amorphous silicon (aSi) layer 111, a spin-on hardmask (SOH) layer 113, a silicon oxynitride (SiON) layer 115, a bottom antireflective coating (BARC) layer 117, and a photoresist 119 are consecutively formed over the SiN layer 109. Next, the photoresist 119 is patterned, and mandrels are formed by reactive ion etching (RIE) the aSi layer 111 through the patterned photoresist. Then, another SOH layer, SiON layer, BARC layer, and photoresist are formed over the mandrels, the photoresist is patterned, and the mandrels are cut by RIE through the patterned photoresist. The layers are repeated once more, and the SiN layer is cut by RIE through the patterned photoresist. Then, spacers are formed around the cut mandrels, and the mandrels are removed. Next, the TiN HM is removed, the underlying ULK layer 103 is etched by RIE through the spacers, and metal is deposited in the etched ULK layer. However, extra materials and deposition process steps are needed to form the SiN and TiN layers.
A need therefore exists for methodology enabling an ASAP process with fewer layers and reduced process steps.